1. Field of the Invention
Generally, the present disclosure relates to the manufacturing of integrated circuits, and, more particularly, to the creation of photomasks for use in photolithographic processes.
2. Description of the Related Art
Integrated circuits typically include a large number of circuit elements which include, in particular, field effect transistors. Other types of circuit elements which may be present in integrated circuits include capacitors, diodes and resistors. The circuit elements in an integrated circuit may be electrically connected by means of electrically conductive metal lines formed in a dielectric material, for example, by means of damascene techniques. The electrically conductive metal lines may be provided in a plurality of interconnect layers that are stacked on top of each other above a substrate in and on which the circuit elements are formed. Metal lines in different interconnect layers may be electrically connected with each other by means of contact vias that are filled with metal.
Due to the complexity of modern integrated circuits, in the design of integrated circuits, automated design techniques are typically employed.
The design of an integrated circuit typically employs a number of steps. These steps may include the creation of a user specification that defines the functionality of the integrated circuit. The user specification may be the basis for the creation of a register transfer level description that models the integrated circuit in terms of a flow of signals between hardware registers and logical operations performed on those signals. The register transfer level description of the integrated circuit may then be used for the physical design of the integrated circuit, wherein a layout of the integrated circuit is created. The thus-created layout may be the basis for the formation of photomasks that may be employed for patterning materials in the manufacturing of the integrated circuit by means of photolithography processes.
In a photolithography process, a photomask is projected to a layer of a photoresist that is provided over a semiconductor structure. Portions of the photoresist are irradiated with radiation that is used for projecting the photomask to the photoresist. Other portions of the photoresist are not irradiated, wherein the pattern of irradiated portions of the photoresist and portions of the photoresist that are not irradiated depends on a pattern of printing features provided on the photomask.
Thereafter, the photoresist may be developed. Depending on whether a negative or a positive photoresist is used, in the development process, either the non-irradiated portions or the irradiated portions of the photoresist are dissolved in a developer and, thus, removed from the semiconductor structure.
Thereafter, processes for patterning the semiconductor structure, which, in particular, may include one or more etch processes, may be performed, using the portions of the photoresist remaining on the semiconductor structure as a photoresist mask. Thus, features in accordance with the created layout of the integrated circuit may be formed on the semiconductor structure.
In the formation of small features in semiconductor structures, resolution enhancement techniques may be employed, wherein so-called sub-resolution assist features (SRAFs) are provided on a photomask. SRAFs are provided in addition to printing features which are employed for forming photoresist features. SRAFs may be provided in the form of small features which may, for example, have a bar shape and which are provided on the photomask in the vicinity of the printing features. Another name sometimes used is “scattering bars.” When the photomask is used in a photolithography process, it is important to note that typically no features corresponding to the SRAFs are formed in the photoresist mask that is provided on the semiconductor structure. In other words, SRAF features are not printed. Instead, the presence of SRAFs may reduce a sensitivity of the photolithography process with respect to variations of parameters of the photolithography process. Such parameters may include, in particular, a focus of the projection and a dose of the radiation used for projecting the photomask to the photoresist.
Typically, two types of techniques for placing SRAFs in the layout of a photomask are applied. One of them includes rule-based SRAF generation methods. Rule-based SRAF generation methods may be fast, in terms of a computation time required for determining the placement of SRAFs, but they are typically not generic and may require significant engineering efforts to set up and maintain a set of rules, which are denoted as “recipes.” Other techniques for SRAF placement include model-based methods, which may provide a higher SRAF quality at a lower recipe complexity. However, model-based methods typically require a longer run time of algorithms employed for the placement of SRAFs. SRAF shapes need to be assessed with respect to their manufacturability.
In view of the above, the present disclosure provides methods and computer readable storage media for providing a high quality of SRAF growing while being fast enough to be used for full-chip runs.